Boost your FPGA development, reduce time, risk and effort
- Maps the board’s resources to the application(s) needs allowing both ease-of-use and maximum system performance
- Generates ASP (Application Support Package) tailored to the required data flow
- FPGA virtualization enabling multi program parallel access (to the same FPGA)
- Automatic recognition and use of active IPs in the FPGA
- Dynamically allocates the system’s free FPGA resources
- Gidel’s FPGA Programming SDK is an integral part of Gidel’s ProcVision Suite— a comprehensive environment for developing customizable vision & imaging systems.
FPGA Programming SDK
Gidel’s FPGA Programming SDK streamlines development by offering both Board Support Packages (BSPs) and Application Support Packages (ASPs). Optimized for Altera FPGA technology, each serves a unique role in simplifying hardware integration and performance optimization.
The BSP provides the essential foundation for FPGA engineers. It includes low-level drivers, configuration files, and host interfaces required to bring up the hardware and ensure seamless communication between the FPGA board and the host system. This setup handles board initialization, memory interfaces, PCIe connectivity, and I/O definitions, forming a reliable base for system development.
Gidel further enhances this with its Application Support Package (ASP)—a high-level automation layer that goes beyond traditional BSP functionality. The ASP maps FPGA resources to match the specific needs of your application. It automatically detects active IPs within the FPGA, configures the appropriate data flow, and allows multiple processes to run simultaneously without interference through multi-program parallel access.
The ASP’s automation eliminates manual resource allocation and reduces the risk of configuration errors, significantly lowering the overall engineering effort. It enables the system to adapt quickly to changes, improves long-term maintainability, and supports faster deployment cycles.
A key benefit of Gidel’s approach is FPGA virtualization. This enables multiple programs or developers to work on the same FPGA simultaneously, each accessing only the required resources. This approach enhances modularity and is ideal for demanding environments such as AI pipelines, high-speed vision, and data acquisition.
The ASP can also dynamically allocate any unused FPGA resources, boosting flexibility and ensuring maximum hardware utilization. Whether the workload is heavy or spread across several smaller modules, system performance remains optimized.
By simplifying integration and maximizing performance, the ASP helps users’ lower development costs and reduce time-to-market.
Gidel’s FPGA Programming SDK is an integral part of Gidel’s ProcVision Suite— a comprehensive environment for developing customizable vision & imaging systems.
Require more information about the ProcWizard?
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FAQ
ProcWizard is a comprehensive FPGA Programming SDK designed to streamline the integration between Gidel hardware and user applications. It automates the creation of the hardware-to-software interface, allowing developers to focus on their unique algorithms rather than low-level driver development and PCIe communication.
The ProcWizard SDK is a complete environment that includes tools for testing and debugging HDL designs, as well as dedicated hardware debugging features. Additionally, it can automatically generate documentation for the design, helping teams maintain long-term code quality and system transparency.
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BSP (Board Support Package): Provides the essential foundation, including low-level drivers, board initialization, and PCIe connectivity. It ensures the host system and FPGA board communicate seamlessly.
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ASP (Application Support Package): Acts as a high-level automation layer. It automatically maps FPGA resources to match the specific needs of your application, detects active IPs, and configures the appropriate data flow, significantly reducing manual engineering effort.
Through FPGA virtualization, ProcWizard enables multi-program parallel access. This allows multiple programs or developers to work on the same FPGA simultaneously, each accessing only the specific resources they require. This modularity is ideal for complex environments like AI pipelines and high-speed data acquisition.
Yes. The ProcWizard software allows for the graphic design of the HDL design envelope and automatically generates HDL projects in System Verilog, VHDL, or AHDL. It also automates the integration of Gidel’s IP cores into the user’s design and can even generate the necessary C++ software drivers.
The SDK features dynamic resource allocation, which automatically recognizes and utilizes active IPs within the FPGA. It can also dynamically allocate unused FPGA resources to different tasks, ensuring maximum hardware utilization and performance whether the workload is a single heavy process or multiple smaller modules.
ProcWizard is optimized for all Gidel’s hardware and is an integral part of Gidel’s ProcVision Suite. It includes an API suite with examples and board drivers for both Windows and Linux, providing a robust and flexible environment for developing customizable vision and imaging systems.