Scalable Vision Architecture for Optical Sorting Machines
Modern optical sorting machines depend on advanced vision architectures to deliver high accuracy and consistent performance. As production lines become faster and more complex, vision systems must support higher resolutions and tighter timing constraints. Consequently, fixed-function designs often struggle to scale or adapt over time.
Modular Infrastructure for Optical Sorting Machines
Gidel provides a flexible vision infrastructure that allows system designers to build, enhance, or upgrade optical sorting machines using modular building blocks. These architectures rely on high-performance Frame Grabbers, which provide deterministic image acquisition and stable real-time processing.
As a result, system performance can scale over time without requiring a complete redesign, while preserving predictable behavior and long-term flexibility.
Deterministic Vision Processing for High-Speed Sorting
In high-speed sorting machines, latency and synchronization are critical. Vision systems must process image data in real time while maintaining deterministic behavior. Otherwise, even small timing variations can reduce sorting accuracy.
Deterministic Processing at High Throughput
Gidel’s FPGA-based vision architecture is designed for predictable, real-time image processing. Moreover, hardware-based Compression IPs reduce data bandwidth while preserving the image fidelity required for accurate decisions:
As a result, high-speed sorting machines can scale throughput while maintaining deterministic, low-latency operation.
Compact Architectures for Embedded Sorting Systems
For space- and power-constrained environments, Gidel also supports compact sorting platforms using Mini Jetson Frame Grabbers. These systems combine deterministic FPGA-based vision processing with NVIDIA Jetson Modules, allowing sorting machines to balance throughput, accuracy, and system footprint.
Optical Inspection Architecture for Sorting Machines
Many systems combine inspection and sorting within a single platform. An optical inspection machine typically performs image analysis, defect detection, or classification before triggering sorting actions. However, inspection workloads can interfere with real-time behavior if they are not carefully managed.
Custom FPGA Algorithm Development
To address this, Gidel enables a unified vision architecture where inspection and sorting coexist efficiently. System designers can design, develop, and deploy custom imaging and vision algorithms directly on the FPGA using the ProcVision Suite. This approach provides full control over latency, precision, and processing flow.
As a result, optical inspection machines can implement proprietary algorithms, optimize performance for specific materials or products, and maintain deterministic behavior even in demanding, high-speed environments.
Gidel PCIe frame grabbers manage high-bandwidth camera acquisition directly on the Altera FPGA, enabling deterministic, low-latency data capture while reducing CPU overhead. Optional inline FPGA processing supports real-time image enhancement, Compression, HDR, and data optimization before host-side processing.
FPGA-Based Camera Acquisition and Processing for Jetson Edge AI
In each FantoVision20 system, the built-in Altera FPGA frame grabber manages high-speed camera acquisition and can perform inline real-time processing, including Compression, HDR, and image enhancements, before data reaches NVIDIA Jetson. This reduces processing overhead on Jetson and preserves resources for CUDA-based imaging and AI.
For advanced development, ProcWizard and Gidel templates enable real-time on-FPGA processing and system architecture customization, including software, I/O interfaces, and HDL design code. The suite can automatically generate the board’s Application Support Package (ASP), including software drivers, the HDL top-level envelope, interface bridges, and Gidel proprietary IPs such as Compression and HDR.
Gidel’s MultiPort memory controller can also be seamlessly integrated, enabling simultaneous multi-application access to the frame grabber and supporting flexible, scalable Imaging & Vision development.
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JPEG Encoder IP – Real-time JPEG compression on FPGA with ultra-low latency, adjustable compression, and efficient silicon use.
Lossless Compression IP – Preserves full image data with zero quality loss, perfect for precision-critical applications.
Quality+ compression IP – Patented, training-based algorithm achieving up to 10:1 compression while preserving and enhancing image SNR, ideal for demanding Imaging & Vision applications.
Gidel’s compression solutions reduce bandwidth, minimize storage, and enhance overall system performance—all in real time.
Reuven Weintraub – Gidel Founder and CTO describes how to boost performance in Machine Vision and Imaging systems. This talk has been given at the Vision Show 2024 Stuttgart, during the Vision Days Forum.
Image processing acceleration on NVIDIA Jetson embedded computer at the Embedded World 2024 show.
Gidel edge computers and frame grabbers at the Embedded World show 2024.
A short video introduction to FantoVision edge computers – 2023.
Boost your vision! Gidel’s high-performance GigE Vision, Camera Link and CoaXPress frame grabbers help overcome bandwidth bottlenecks in high-resolution and/or high-speed computer vision applications.
Gidel presented its FPGA-based architecture capable of processing Giga+ Pixels per second while maintaining exceptionally low power consumption.
The session demonstrated how Gidel’s scalable FPGA solutions deliver real-time imaging performance, energy efficiency, and deterministic throughput for advanced vision and imaging systems.
Reuven Weintraub, Founder and CTO of Gidel, presented Gidel’s solutions to perform high-bandwidth imaging on the edge at InVision TechTalk webinar held on September 2023.
Gidel founder and CTO Reuven Weintraub present the new with FantoVision edge computers for 10GigE Vision, Camera Link and CoaXPress interface for embedded vision on the edge at the Embedded World Show 2022 in Nuremberg, Germany.
Gidel founder and CTO Reuven Weintraub explain the benefits of Gidel’s Altera-based high-performance FPGA modules for fast and easy development.
Gidel founder and CTO Reuven Weintraub present the performance and versatility of Gidel’s GigE Vision, Camera Link and CoaXPress frame grabbers for high-speed image acquisition and pre-processing at the Embedded World 2022 in Nuremberg, Germany.
Presented by Reuven Weintraub, this talk highlighted Gidel’s expertise in real-time processing over Gigapixel/s image streams, demonstrating how FPGA-based architectures enable deterministic latency, scalable throughput, and efficient handling of ultra–high-resolution vision data.
Ron Muller presenting Gidel’s first heterogeneous Edge Computer Vision combining FPGA and NVIDIA Jetson at Industrial Vision Days conference at VISION 2021 show in Stuttgart, Germany.
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